The present invention relates to a buffer-storage control system, and more particularly a buffer-storage control system for storing accesses in a pipeline data processing system from a data processing unit and the like to a memory system having a two-level hierarchical structure composed of a main storage and a buffer storage.
A buffer storage generally comprises a tag portion (TAG) and a data portion (DATA), each of these portions comprising a plurality of ways, way portions, associative levels or partitions. In one type of buffer storage device different portions of the storage are set aside for storing the contents from corresponding portions of main memory. For example, assume that a buffer storage is divided into first through third associative levels or partitions and that the main memory is also divided into corresponding first through third partitions. In this situation data from the third main memory partition can only be stored in the third partition of this type buffer storage. That is, data from partitions in main memory is stored in corresponding partitions or associative levels in buffer storage.
Each way of the tag portion and the data portion comprises a plurality of blocks, each block being a data unit of a storing or transferring operation. The tag portion has a plurality of valid bits corresponding to the blocks for indicating block validity, i.e., indicating that data is already transferred to the corresponding block from the main storage and a write operation is possible.
In a data processing system comprising a two-level hierarchical memory system composed of a main storage and a buffer storage, when the memory system is accessed, every partition of the above-mentioned tag portion is read out simultaneously, i.e., the coincidence of addresses is checked, to determine whether or not the buffer storage stores data of a designated address. Noncoincidence of any of the addresses in the partitions with the designated address indicates that the target data is not stored in the buffer storage. Therefore, the data of the designated address is read from the main storage and transmitted to the buffer storage. Thereafter, the memory system is generally controlled so that the memory access is made to the buffer storage.
In a buffer-storage control system of a "store-through" type, when store-accessing the main storage, if an address block memorizing or storing the address corresponding to that for the store access is found in the buffer storage, the buffer storage is store-accessed at the same time. If the address block is not found in the buffer storage, the memory system is controlled so that the buffer storage is not store-accessed but only the main storage.
If the data processor for performing pipeline processing is continuously storage-accessing the buffer storage, the storing operation and fetching operation caused by a succeeding instruction will overlap and the fetching operation of the succeeding instruction will be delayed. This wastes machine cycles and reduces the processing ability of the overall computer system.